3-way clock divider based yusynth

Incoming clock signals ("IN1" is normalized to "2&3") are output as divided signals, depending on the switch setting.
"RST" is the reset input and resets all three channels.
A red LED indicates the status of the respective outputs.
The pulse width of the incoming clock is preserved at the outputs.

https://www.yusynth.net/Modular/EN/DIVIDER/index.html